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[VHDL-FPGA-Verilogelec_lock

Description: 本程序是用VHDL语言实现电子密码锁功能,整个系统分为三大模块,一为控制模块,二为键盘显示模块,三为处理模块-This procedure is a VHDL language electronic code lock function, the entire system is divided into three modules, one for the control module, two for the keyboard display module, three modules for the treatment
Platform: | Size: 269312 | Author: 敬礼 | Hits:

[VHDL-FPGA-Verilogmimasuo

Description: 用VHDL编写的数字密码锁,很实用,喜欢请下载-Prepared using VHDL digital code lock, it is practical, likes to download
Platform: | Size: 2048 | Author: ding | Hits:

[VHDL-FPGA-Verilogvhdl

Description: 基于EDA技术的数字密码锁源程序代码,大学实训用的着-EDA-based Digital code lock source code, used by the University Training
Platform: | Size: 7168 | Author: shark | Hits:

[Othercodeloc1k

Description: 实现电子密码锁的各项功能,经过编译和仿真-Electronic code lock of the function, the compiler and simulation
Platform: | Size: 436224 | Author: 何情 | Hits:

[VHDL-FPGA-Verilogvhdl4

Description: 数字密码锁: 1.系统具有预置的初始密码“00000001”。 2.输入密码与预存密码相同时,开锁成功,显示绿灯,否则开锁失败,显示红灯。 3.具有修改密码功能。修改密码时,先开锁,开锁成功才可以修改。 4.系统同时具有关锁功能。关锁后,显示红灯。 5.密码由拔码开关表示,开锁由按键表示。 6具有一个复位按键。按键后,回到初始状态。 -The number of locks: 1. System has preset the initial password 00000001. 2. Enter the password with the stored password is the same, unlock success, showing a green light, or else unlock the failure to show a red light. 3. With the Change Password function. Modify password, to unlock, unlock success only can be amended. 4. System lock clearance at the same time. Clearance after the lock, showing a red light. 5. Password code switch from Stubbs said that by the keys that unlock. 6 has a reset button. Button to return to the initial state.
Platform: | Size: 251904 | Author: 宫逢源 | Hits:

[VHDL-FPGA-Veriloglift

Description: (1)用VHDL实现四层电梯运行控制器。 (2)电梯运行锁用一按钮代替(开锁上电),低电平可以运行,高电平不能运行。 (3)每层电梯入口处设有上行、下行请求按钮,电梯内设有乘客到达层次的停站要求开关,高电平有效。 (4)有电梯所处楼层指示灯和电梯上行、下行状态指示灯。 (5)电梯到达某一层时,该层指示灯亮,并一直保持到电梯到达另一层为止。电梯上行或下行时,相应状态指示灯亮。 (6)电梯接收到停站请求后,每层运行2秒,到达停站层,停留2秒后门自动打开,开门指示灯亮,开门6秒后电梯自动关门。 (7)能记忆电梯内、外的请求信号,并按照电梯的运行规则依次响应,请求信号保留至响应后撤除。 (8)人数超载或超重用一按钮代替,高电平有效,超载时电梯不能运行,并有相应指示。 (9)事故报警按钮高电平有效,事故报警不能运行,并有指示灯,信号保留至事故消除 -(1) the realization of four-storey elevator with VHDL controller operation. (2) elevator button with a lock to run in place of (unlock power), low run, can not run high. (3) on each floor with elevator at the entrance to the uplink, downlink request button, which are equipped with passenger elevators to reach the level of the requirements of stoppings switch, high effective. (4) elevators and escalators which lights up the floor, down the state indicator. (5) elevator to reach a certain level, the level indicator light, and has remained until the elevator arrived at another level. Elevator uplink or downlink, the corresponding status indicator light. (6) Elevator stops receiving a request, each running two seconds to reach the stops layer, two seconds back door stay open automatically, open the door indicator light, 6 seconds after the elevator door closed automatically. (7) to memory elevator inside and outside the request signal, and in accordance with the rules followed
Platform: | Size: 289792 | Author: 管皮皮 | Hits:

[VHDL-FPGA-VerilogVHDL(LOCK)

Description: 数字密码锁的设计与实现 一.实验目的 1. 学习VHDL的综合设计应用 2. 学习数字密码锁的设计 二.实验内容 设计一个数字密码锁,对其编译,仿真,下载。 数字密码锁具体要求如下: 1.系统具有预置的初始密码“00000001”。 2.输入密码与预存密码相同时,开锁成功,显示绿灯,否则开锁失败,显示红灯。 3.具有修改密码功能。修改密码时,先开锁,开锁成功才可以修改。 4.系统同时具有关锁功能。关锁后,显示红灯。 5.密码由拔码开关表示,开锁由按键表示。 6具有一个复位按键。按键后,回到初始状态。 -VHDL Digital Design and Implementation of lock 1. Purpose of the experiment 1. VHDL Integrated Design and Application of Learning 2. Learning digital code lock design 2. Experimental content Design a digital lock on their compilation, simulation, download. Digital code lock specific requirements are as follows: 1. System has preset the initial password "00000001." 2. Enter the same password with the stored password, unlock successful, a green light, or unlock failed to show a red light. 3. With the change password function. Modify password, the first lock, unlock success can modify. 4. The system also has off lock. Shut up after the red light. 5. The password code from the pull switch that unlock the keys, said. 6 has a reset button. Button, the return to initial state.
Platform: | Size: 18432 | Author: 爱好 | Hits:

[VHDL-FPGA-VerilogVHDmimasuo

Description: 用VHDL编写的具有如下功能的电子密码锁:输入为八位二进制的电子密码锁 输入正确,开锁灯亮,输入错误,开锁警示灯亮,同时发出报警声音,按下复位键,报警消失,具有密码修改功能-Prepared using VHDL has the following features of electronic code lock: eight binary input to enter the correct electronic code lock, unlock lights, wrong, unlock warning lights at the same time an alarm sounds, press the reset button, the alarm disappears, with the password changes function
Platform: | Size: 2048 | Author: liuyunyu | Hits:

[OthermimasuoVHDL

Description: 用VHDL语言实现的8位密码锁的设计,适用于毕业设计或课程设计参考!-VHDL language with 8-bit code lock design for graduate design or curriculum design reference!
Platform: | Size: 5120 | Author: 田有林 | Hits:

[Othershuzimimasuo

Description: EDA数字密码锁设计:基于FPGA芯片,采用VHDL语言设计,具有键入预设6位密码,3次出错报警,复位等功能。-EDA digital code lock design: Based on the FPGA chip using VHDL, type the default 6 with the password 3 times error alarm, reset and other functions.
Platform: | Size: 198656 | Author: whai | Hits:

[VHDL-FPGA-Verilogcodelock

Description: VHDL语言编写的数字密码锁,异步清零,带有开锁,关锁,修改密码的功能-VHDL language digital code lock, asynchronous clear, with a lock, lock, change the password function
Platform: | Size: 1024 | Author: 众人 | Hits:

[VHDL-FPGA-Verilogshuziluoji

Description: VHDL课程设计 数字密码锁 设计一个简易的密码锁电路,该锁应在受到3位与规定码相符的十进制数码时打开,使相应指示灯亮;若收到于规定代码不符或者开锁程序有误,表示错误的指示灯亮。-VHDL design course design a digital lock easy lock circuit, the lock should be subject to three decimal consistent with the provisions of the digital code when opened, the corresponding indicator light If you receive does not match the prescribed code or unlocking procedure is wrong, that the wrong light.
Platform: | Size: 82944 | Author: sofia | Hits:

[VHDL-FPGA-VerilogElectronic-Lock-(VHDL)

Description: 开锁代码为2位十进制并行码。 当输入的密码与锁内的密码一致时,绿灯亮,开锁;当输入的密码与所内的密码不一致时,红灯亮,不能开锁。 密码可由用户自行设置。 密码可由七段数码管显示出来。 -The design is based on the VHDL language, using the MAX+ plusII parallel electron two locks design, and design process described in detail. VHDL language used to conduct electronic code lock design enables simple and intuitive design, fast implementation of established function. Electronic locks at the security of property protection has an important role in a very broad application prospects. The electronic locks used in parallel two decimal password, when the input password with the password lock consistent with, the green light, unlock when the input password with the password lock is inconsistent, the red light, should not become disengaged. Password Lock user password can be set up.
Platform: | Size: 46080 | Author: 天街小雨 | Hits:

[SCMmimasuo

Description: EDA课程设计基于VHDL的电子密码锁设计-EDA curriculum design with VHDL-based electronic code lock design
Platform: | Size: 16338944 | Author: 燕子 | Hits:

[VHDL-FPGA-Verilogdigital-lock

Description: 数字锁的详细设计流程以及VHDL仿真过程和结果,附有源码-The detailed design process digital lock and VHDL simulation process and results, with source code
Platform: | Size: 24576 | Author: WPQ | Hits:

[VHDL-FPGA-Verilogcode_lock_vhdl

Description: 在ISE环境下用vhdl写的一个密码锁程序。下载到xilinx 公司的 spartan6 的板子上验证过的,也有仿真代码。主要就是几个状态之间的转换,用了一个moore状态机。-In the ISE environment using vhdl to write a lock program. Downloaded to the board spartan6 xilinx' s proven, there are simulation code. Mainly the conversion between several states, with a moore state machine.
Platform: | Size: 846848 | Author: 高转转 | Hits:

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